.ALIASES
X_U1A           U1A(Z=SIG_C Y=SIG_T A=I/P VCC=+5V GND=0 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS253@LVDS
+DIFFERENTIAL SIGNALING DEMO.SN55158_0.Normal(chips)
X_U2            U2(+=SIG_T -=SIG_C V+=+5V V-=0 OUT=O/P sense=O/P ref=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS467@MAXIM.MAX4144/MXM.Normal(chips)
R_R9            R9(1=I/P 2=N17670 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS17646@FILTSUB.R.Normal(chips)
V_V7            V7(+=+5V -=0 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS17921@SOURCE.VDC.Normal(chips)
R_R10           R10(1=0 2=O/P ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS18218@FILTSUB.R.Normal(chips)
V_V8            V8(+=N17670 -=0 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS20173@SOURCE.VPULSE.Normal(chips)
R_R12           R12(1=0 2=N21701 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS21735@FILTSUB.R.Normal(chips)
X_U4A           U4A(Z=N23450 Y=N23407 A=N21683 VCC=N21539 GND=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS21617@LVDS DIFFERENTIAL SIGNALING DEMO.SN55158_0.Normal(chips)
X_U3            U3(+=N23419 -=N23462 V+=N21551 V-=N35380 OUT=N21701 sense=N21701 ref=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS21575@MAXIM.MAX4144/MXM.Normal(chips)
V_V9            V9(+=N21539 -=0 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS21511@SOURCE.VDC.Normal(chips)
V_V10           V10(+=N21551 -=0 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS22319@SOURCE.VDC.Normal(chips)
V_V13           V13(PVS=N21683 NVS=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS22925@PSPICE_ELEM.V_SQUARE.Normal(chips)
T_T1            T1(A+=N23407 A-=0 B+=N23419 B-=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS23306@ANALOG.T.Normal(chips)
T_T2            T2(A+=N23450 A-=0 B+=N23462 B-=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS23322@ANALOG.T.Normal(chips)
R_R13           R13(1=0 2=N21683 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS28511@FILTSUB.R.Normal(chips)
C_C1            C1(1=0 2=N23462 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS29003@FILTSUB.C.Normal(chips)
C_C2            C2(1=N23419 2=0 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS29028@FILTSUB.C.Normal(chips)
V_V14           V14(+=N30716 -=0 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS30726@SOURCE.VDC.Normal(chips)
V_V15           V15(+=N30770 -=0 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS30746@SOURCE.VDC.Normal(chips)
X_U6A           U6A(Z=N31024 Y=N30828 A=N30972 VCC=N30770 GND=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS30898@LVDS DIFFERENTIAL SIGNALING DEMO.SN55158_0.Normal(chips)
R_R14           R14(1=0 2=N31008 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS31062@FILTSUB.R.Normal(chips)
T_T3            T3(A+=N30828 A-=0 B+=N33145 B-=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS30780@ANALOG.T.Normal(chips)
X_U5            U5(+=N30838 -=N31086 V+=N30716 V-=N35997 OUT=N31008 sense=N31008 ref=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS30840@MAXIM.MAX4144/MXM.Normal(chips)
V_V16           V16(PVS=N30972 NVS=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS31158@PSPICE_ELEM.V_SQUARE.Normal(chips)
R_R15           R15(1=0 2=N30972 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS31098@FILTSUB.R.Normal(chips)
T_T4            T4(A+=N31024 A-=0 B+=N33314 B-=0 ) CN @LVDS DIFFERENTIAL SIGNALING
+DEMO.SCHEMATIC1(sch_1):INS31030@ANALOG.T.Normal(chips)
X_V17           V17(+=N30838 -=N33145 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS32716@SOURCE.VRNDMN.Normal(chips)
X_V18           V18(+=N31086 -=N33314 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS33180@SOURCE.VRNDMN.Normal(chips)
V_V19           V19(+=N35380 -=0 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS35149@SOURCE.VDC.Normal(chips)
V_V20           V20(+=N35997 -=0 ) CN @LVDS DIFFERENTIAL SIGNALING DEMO.SCHEMATIC1(sch_1):INS35930@SOURCE.VDC.Normal(chips)
_    _(+5V=+5V)
_    _(I/P=I/P)
_    _(O/P=O/P)
_    _(SIG_C=SIG_C)
_    _(SIG_T=SIG_T)
.ENDALIASES
