Hello.
Welcome back.
So in this section we're going to talk about armed design philosophy and the risk architecture and this
very lesson we're going to talk about a risk design philosophy.
But before we do that I want to spend some time to give a short introduction on arm as a company so
obvious a company based in Cambridge U.K. arm is a design firm that do not manufacture any hardware
or silicon.
All they do is they come up with the designs of the architecture and then they sell the license to companies
such as Apple.
Some song while we Qualcomm Texas Instruments extra.
So this is very key when you hear of the armed company don't produce any hardware digits.
Design is the design the arm the architecture and then sell it out as a license to arm all the various
brands that we know.
So let's move on so risk stands for reduced instruction set.
And this is sharply different from Sisk which stands for the complex instruction sets as we shall see.
And this course proves the source used to risk architecture while internal processes use complex instruction
sets.
And if you don't know what instruction sets means don't worry about this for now.
We have sections dedicated to instruction sets for now.
You can think of instruction set as this set of instructions in a language.
A good analogy will be the set of words in the English language all the set of words in the Chinese
language etc. like we do in our daily lives.
We use the set of words available in English to construct sentences to convey meaning to the person
we are talking to in the same way we use the instructions available in a particular instruction set
off the computer micro architecture to convey meaning to the computer hardware the risk design philosophy
is aimed at simple but powerful instruction that execute within a single cycle a Thai clock speed risk
focuses on reducing complexity of the instruction is performed by hardware because it is easier to provide
greater flexibility and intelligence and software write it down in hardware.
As a result greater demand is placed on the compiler risk philosophy is implemented with four card in
all design rules in mind.
One there has to be reduced number of instructions and each instruction must be executed in a single
cycle to make sure every process a cycle executes on instruction.
Instructions are executed in parallel using pipelines which we shall talk about later.
This is important because in Sisk there are times the process just runs.
While waiting for data or instruction to be ready for memory also risk.
Machines provide a large number of general purpose registers in a register that can eat up the data
or address registers our first local stores that we do processing and we shall look out registers later.
SISK architecture registers how dedicated purposes therefore do you know as flexible.
Also in risk architecture the process operates on data held in the registers.
This is one of the other reasons risk processes are capable of one instruction per cycle.
The next lesson which I'll look at is how uses risk architecture combined with their own design philosophy
to design powerful process laws.
I'll see you in the next lesson.