Hello fellas.
Welcome back.
So in this lesson we're going to talk about the armed bus technology and the armor bust protocol.
So this is our simplified ARM based embedded device from before and the buses are the blue lines as
indicated in the diagram.
So basically these are two classes of devices connected to the bus.
There is the bus master and the bus leave the bus master is often a logical device capable of initiating
data transfer with another device and the slave is capable of only responding to a transfer request
from the master a bus has to architecture levels and the first level is known as the physical level.
The second level is known as the protocol level.
The physical level deals with the electric core characteristics of the bus and things like the bus with
example 16 bits 32 bit 8 bits etc. We shall look at this stuff later.
The bus protocol dictates the rules the the bus master and the bus leave uses to communicate.
Now let's give a short overview of the amber bus protocol.
The Amber stands for Advanced microcontroller bus architecture and it is the widely adopted on chip
architecture used for process source.
The very first Amber buses where the the arm system bus and the peripheral bus.
Later on introduced the high performance bus using the amber protocol for designers can reuse the same
design on multiple projects.
The HP provides a higher throughput than the ESB and an APB because it is at this a sort of centralized
more to place bus scheme which we sure look at later rather than a bi directional design like the ESB
and the APB.
And because of this HP buses are able to run at higher clock frequencies.
So this is all there is to it and I'll see you in the next lesson.