Hello fellas.
Welcome back.
As I mentioned earlier armies made of different process of families and there are some variations in
the architecture among the processors.
So for this cause I'm given a very generic overview of the ARM architecture.
But as we proceed the examples provided shall be focused on two specific processors the cortex and the
seven TDM II processors.
However the beauty of lending arm assembly is that once you know how to program in assembly for a particular
arm board should be able to write code on other boards.
In fact the Assembly we show right here should run on all boards except in situations where a particular
board can execute just the thumb instruction set.
In our code it's using just the ARM instruction set.
So the key thing here is to understand the instruction set architecture used by armies should be able
to write assembly code for any army based board right.
Moving on.
Let's take a look at the process on modes of the 70 BMI.
For those of you who don't know the 70 they're my.
Don't worry.
At the end of this section we shall give a list of the entire process of family and you know explain
the differences amongst the 70 BMI is just a member of the family older version of the 70 BMI version
14 course supports seven process or most of these are they use a mode the system mode the on defined
mode the airport mode to normal INTERRUPT REQUEST mode the fast INTERRUPT REQUEST mode and the supervisor
mode.
It's possible to make most changes under software control but most are normally caused by external conditions
like exceptions.
Most application programs will execute and use a mode the other modes so no nasty privileged mode.
While the use of mode is the unprivileged mode and the privilege modes are a way to serve as exceptions
or access protected resources such as bits that disable sections of the call like a branch predictor
or cache memory.
One other way of looking at this is too few and mode as an indication of what the process is actually
doing in normal circumstances the system will be either in use some mode or supervisor mode.
Consider a device like a cell phone where not much happens until either a signal comes in.
While the user has pressed their key onto such a time the processor probably has powered itself down
and it's using less power and it's it's probably waiting for an event to occur before it wakes up to
use more power.
These external events could be seen as interrupt typically processors have different number of interrupt
but the arm TDM has two types the fast interrupt and the lower priority interrupt no nasty known as
the normal interrupt you can think of fast interrupt us one that might be used to indicate the system
is about to lose power in a few milliseconds and the normal interrupt one that would be used to indicate
the peripheral needs to be serviced or the screen has been touched or the mouse has been moved etc.
Things like that the abort mode simply allow us to process or to recover from exceptional conditions
such as a memory access to one address that doesn't exist physically.
This mode can also be used to support virtual memory systems also required for operating systems like
Linux process or was switched to the undefined mode when it sees on instruction in the pipeline that
it does not recognize it is the responsibility of We the programmers to arm to determine how the machine
should recover from such an error ask for a supervisor mode.
We've got dedicated sections just to talk about it and the relation it's got with the interrupt and
exceptions.
Now let's take a look at the process on most of the cortex and I'm not a member of the process or family.
The cortex M4 has only two modes.
The the handler mode and the threat mode and there are two access levels to go along with these modes
the privileged access level and the user access level depending on what the system is doing for very
simple applications to purchase on me only stay in a single access level whereas in situations where
you have an embedded operating system control in every security may play a role by partition into kennels
stacked memory from the user stacked memory to avoid problems.
And again we shall leave the discussions on exception handling to the sections on exception interrupting
other supervisor applications.
So this is all there is to it and I'll see you in the next lesson.