Hello fellas.
Welcome back.
In this lesson we shall look at the southern TDM my vector table.
The exception of vector table consist of designated addresses an external memory that hold information
necessary to handle an exception an interrupt or other unusual event such as a reset.
You know a good example is what the process does when an interrupt occurs it changes the program counter
to something like 0 x 1 8 and begins fetching instructions from there.
The data addresses that are located at these addresses are actual instructions which we shall take a
look at the next instruction the machine is likely to fetch is the branch instruction.
Assuming you the programmer puts such an instruction address you x 1 8.
Once this branch instruction is executed the process will begin fetching instructions for the interrupt
handler held in the target's address.
The recent exception factor is that memory address 0 0 0 0 0 0.
The system will fetch from this address immediately as it comes out of reset.
We can provide a reset exception handler or we can simply begin our code from here as we shall see later.
I will call you vision which is the the two chain an idea we're going to be using generators startup
reset handler for us.
Dead exception is jumped to various posts on most listed and d the addresses of the various modes listed
with the mode so there is that exception operates in the SBC mode.
The undefined instruction exception operates in the undefined mode the IRR Q interrupts the normal interrupt.
Exception operates in the interrupt mode.
The abort the data abort exception operates in the sports mode.
So when any of these exceptions or care dies the process I jump straight to the respective addresses.
Don't worry my view if you don't understand what exceptions or interrupt are we going to write code
to demonstrate and use them.
So yeah this is this is this an overview of the 70 TDM factor table and I shall see you in the next
lesson as we take a look at the core text M family.