Hello.
Welcome back.
The cortex and family differs from earlier designs like the arm 70 then my buddy program this model
is remarkably similar.
The process of course are very small generally for the cortex and family members and it's implement
only some of them.
Some of the cortex end process or implement only a subset of the instruction set.
What if some instruction sets the cortex has fewer physical registers compared to the 70 TMI.
However the 16 registers in the seven TDM I use a mode are the same as the first 16 registers of the
cortex and register bank the cortex M has 17 general purpose registers 1 status register and 3 interrupt
mask registers are 0 through are twelve are the general purpose registers these registers as we discussed
earlier can hold any value you want they can hold in a set to bids value in fact they can hold time
of values variables if undesired in a field tell you can keep the fields of coefficients in them acts
of terror are 13 are 13 over here is known as the young the stock point to register and it is a special
function register the stock point register is actually banked as we shall see there is the main stack
pointer and the arm there is the main stack pointer and the process that pointer It's a bank to register
our 13 over here there is the MSP and the PSP the MSP use the main stack pointer and the PSP is the
process stack pointer our 14 is the link register and it is also a special function register it hosts
the return address off a subroutine or an exception AR 15 as the program counter register it is the
third special function register and it points to the instruction being fetched in the pipeline the express
our register is known as the program status register and you will understand why we have X here in a
minute the Express are the prime mosque the fourth mosque the base PRI and the control registers are
special registers these registers are different from the special function registers and because they
are special registers we have to access them using special instructions such as the MRF which is used
to read from a special register and the MSR which is used to write into a special register which we
shall experiment with the X PSR performs the same function as the CPS are indeed serving today my process
all but with different fields the entire register can be accessed once or you can examine it in three
different ways the Express are is actually three registers D they are the API are the PSR and the IP
yes are the AP s are simply stands for the application program status register the PSR means the execution
program status register and the IP SA means the interrupt program status register the AP SAR the EPA
are and the IPA are are just specialized for use of the same register the APIs are contains the status
flags and C and the greater than or equal flags and another flag known as the sticky flag the Q flag
used in saturation arithmetic which we shall be working with sticky means that the bids can only be
cleared by explicitly write in 0 2 this bit the IPA SA contains only an exception number that can be
used in handling forms and other types of exceptions the EPA SA contains the I T also known as the if
den bit which overlaps with the interrupt continuation bids it also has the bits known as the T bit
and this t that stands for the thumb bit in future sections we shall use the D I T bit the IFT in in
our loops when we start coding.
So in summary the end bit is called the negative bit and it sets high when every sort is negative the
C is known as D zero bits and it sets high when a result is equal to zero the C is known as the carry
bit V is the overflow bit and so on.
We shall explain these flags further when we applying them in our code.
So this is all there is to it and I'll see you in the next lesson.