Hello.
Welcome back.
The cortex infected table is considerably different from the arms of TDM effector table.
Yeah we can see the various exception types and their own exception numbers and addresses in memory.
An important point is that the LSP bit of the LSP is the least significant bit should be always said
to one.
Although if you're coding and see language the compiler will take care of this for you.
When we start looking at the instruction set in future sections we will discover that the cortex process
or executes the thumb to instruction set RIGHT ON THE ARM instruction set.
Executed it by the 17 year by the cortex M. Haas about 10 exceptions.
Each exception has its own exception number it's got its address in memory.
So these are the exceptions listed.
And don't worry if you don't understand them here.
Yes just to give you an introduction of the exceptions available on the cortex in process or when we
start coding and applying them to our code we'll elaborate on them further.
So this is all there is to it and I will see you in the next lesson.