So let's try to focus on profiling in this specific section, right, so we'll be considering how you
do a profiling with any say timer with the 64 bit global timer that we have.
And the last thing that we've been doing is the in-built profiling feature that we have with and why
you decided, right?
So for our first case, when we discuss how we do profiling, get an excited Daimler mate.
So first thing that we need to do is to include any, say, timer IP that is mandatory there if you
plan to perform profiling with any exciting merit.
So let's first start all the mandatory rules, which allow us to interface the exact time where IP with
the processing system, right?
So we go to a useful configuration in the general tab.
We enable the clock reset.
Then we go to GP Mastery Ixi interface, and we'll enable Mexi to be zero interface.
OK, we go to a clock configuration and will allow people fabric, let it just use an output frequency
or 100 megahertz rate.
So this will be the frequency that will be used for a profile.
So we will be later understanding how we use this frequency rate.
So here we choose how to make our time.
Click OK.
So now we have all the necessary board that allow us to interface our exciting IP with the zinc processing
system so we know at any time great a.
So we just acquired a single 32 bit timer, right?
So it will just be reconfiguring our essay time or AP, OK, to include only a single timer to be.
I'm checking this and click, OK, right?
So this is done.
We perform a collection automation that allow us to automatically connect essay time where IP to housing
processing system.
Right?
So now you will see we have a zinc processing system, and it's a time where IP which are connected
together with the help of any exchange token.
Great.
We do not want any of the output from desi excited.
So we will just be keeping on the plane's loading.
OK.
So this basically retreated into only two ports, which are present in our design, right?
So we have a DDR fixed view.
With this, we see to perform a validation of design.
So once validation is successful, we proceed and create, and I still have all the pools which are
present in our design already have the respect to hard work and.
So we can directly proceed for termination of a bitstream as soon as I wrap, it is ready.
Right?
So our rapid is ready.
We proceed to do the best you.