As the HLS design flow is a new topic, its learning requires a step-by-step approach with several examples. 1
The structure of this course is based on this assumption. 2
This course is the first step towards using HLS to design logic circuits and computing algorithms 3
for FPGA-based platforms. 4
In this course, I will take the HLS approach to explain the fundamental concepts in digital design. 5
I assume that you are not familiar with FPGA. However, it would be a bonus if you know FPGA 6
and the HDL design flow. 7
This course looks at FPGA from a high-level perspective without going into the low-level hardware details. 8
This course would give you the foundation of using HLS for digital design in Xilinx-based FPGAs to enhance 9
your productivity compared to the traditional HDL design flow. 10
You don’t need to have prior knowledge about FPGA. 11
Moreover, the course is designed such that you also don’t need to read other books or documents to 12
use 13
HLS 14
However, referring to Xilinx documents, especially “Vivado Design Suite User Guide: High-Level 15
Synthesis-UG902” is recommended. 16
For more examples and discussions about the HLS-based design approaches, you can refer to the 17
highlevel-synthesis.com web-log-site or the course Github site. 18
If you have any questions or issues regarding the concepts and codes presented in this course please 19
refer to the Q&A section. 20
In this course, you’ll learn, What FPGA is, How to use HLS design flow to implement different types 21
of combinational logic circuits, and how to work with state-of-the-art 22
HLS software tools to implement algorithms on hardware. 23
This is a practical course. Throughout the course, 24
I will explain the concepts of FPGA structure, software tools, HLS techniques, and coding styles 25
to implement several examples. 26
This course comprises of four parts. 27
The first part is called prologue 28
that introduces the course and its structure throughout two lectures. 29
The current video is the second lecture. 30
The second part is called “introduction and setup” which gives a big picture of the FPGA technology and 31
its design flow and how to install related software tools and set up the target FPGA board. It consists 32
of two sections and 15 lectures, from lecture 3 to 17. 33
If you are already familiar with Xilinx FPGAs and the Xilinx Vivado and Vivado-HLS toolsets, then 34
you can skip this part. 35
The third part explains how to develop combinational circuits using C/C++ language in HLS. This part 36
consists of 9 sections and 88 lectures. 37
Finally, the last part puts all explained techniques together to implement two exciting projects. 38
. It consists of two sections and six lectures. 39
The first project implements a Home Alarm System. 40
It consists of two groups of sensors and detects any security breach in the system 41
and reports that properly. The second project implements a simple calculator which can perform 8 42
operations and display the results on the seven-segments available of the Basys3 board. 43
Each lecture describes a single idea which is presented through a couple of slides. 44
The first slide tells the topic and the motivation, then it follows by a few slides explaining the main ideas and concepts. 45
After that, a slide gives the motivation of the next lecture by posing a question. 46
This slide also creates a conceptual link between two consecutive lectures. 47
Then I summarise the lecture contributions through a few takeaway messages. 48
The last slide in each lecture contains a quiz that helps you to concentrate on the main idea. 49
In this course, I have considered the Xilinx Basys 3 FPGA board as our target platform. Basys 3 50
is an entry-level development platform based on the latest Artix-7 Xilinx FPGA designed exclusively 51
for Vivado Design Suite. 52
However, the concepts and techniques explained along this course are valid for all other Xilinx FPGAs. 53
What is the necessary information that we should know to start designing with HLS for FPGA? 54
This question will be answered in the following part, which consists of two sections. 55
The takeaway messages are, This course explains the fundamental of digital design using the Xilinx 56
HLS toolset 57
You don’t need to have an in-depth hardware knowledge to follow this course 58
Familiarity with C/C++ language is necessary 59
As this lecture quiz, download the “Vivado Design Suite User Guide: High-Level Synthesis-UG902” 60
document and have a look at its Table of Contents.