In this lecture, I am taking the parity-bit generator design as a typical example that contains a 1
repetitive computing pattern which can be implemented by the parallel for-loop in HLS. 2
The parity-bit is a technique to detect a single-bit error in binary data. 3
The binary data can become erroneous while it is saved in the memory or during the process of transmitting 4
from one place to another. 5
Some bits may change their states because of different types of unpredicted events such as the interaction 6
with energetic particles (or terrestrial radiations), magnetic fields or electric spikes. This phenomenon 7
is critical in nano-scale semiconductor technologies, nuclear power stations, satellites and aerospace 8
applications. 9
Single Event Upset (also known as soft-error) is one of the famous models representing this type of error. 10
This model assumes that one of the binary bits changes its state from 0 to 1 or from 1 to 0. 11
As an example, a Single Event Upset in the flight computers of Airbus A330 on 7 12
October 2008 is suspected to result in an aircraft upset that nearly ended in its crashing after the 13
computers underwent several malfunctions. 14
Parity is a simple mechanism to detect a single bit error in a binary data. 15
The parity bit is a one-bit signature of an n-bit binary data that is usually saved or transmit with 16
the data. 17
A parity bit generator receives data and generates the parity-bit. Then this bit is attached to the data. 18
Later, the parity-bit checker can check the validity of the parity-bit and detect any possible 19
single-error in the data. 20
There are two types of parity: odd parity and even parity. 21
The idea behind this is that the total number of “1”s in a binary value should always be even or odd. 22
The parity bit should be generated to meet this constraint. 23
The parity bit should be generated to meet this constraint. 24
Let’s take a few examples: 25
If we assume that the binary value is 0b1101001, then the number of 1s is 4, 26
which is even. 27
In the case of even parity, the extra bit should be zero 28
that is p=0. 29
This makes the total number of 1’s in the (data+parity) value even. 30
In the case of odd parity, the extra bit should be 1 that is p=1. 31
This makes the total number of 1’s in the (data+parity) value odd. 32
If the data is 1011101, which has five 1s, then even parity bit is 1 and 33
the odd parity-bit is 0. 34
In the following lecture, I will explain how to implement the parity bit generator circuit using a set of 35
XOR gates. 36
The takeaway messages are: Parity-bit can be used to detect a single-bit error in a binary data 37
There are two types of parity-bit: even and odd, In the even parity, the (parity + data) should have an 38
even number of bits, In the odd parity, the (parity + data) should have an odd number of bits 39
Now the first quiz 40
Find the even parity bit (pe) and odd parity bit (po) for the following data 41
As the second quiz find the erroneous data in the following (parity+data) binary values.