How does a LUT work in an FPGA? LUTs are the main building blocks of FPGAs that 1
implement combination logics. Here, 2
I am going to explain the idea behind the LUTs. 3
A Look-up table has a configuration memory that keeps all the possible outputs of a logic function. 4
It also has a set of inputs to select the proper cell in the memory corresponding to the inputs logic 5
state. 6
But how is this selection process possible? 7
Here I am going to quickly explain the idea behind this selection by introducing the concept of multiplexers. 8
One of the key components inside a look-up table is a multiplexer. A simple multiplexer has two data inputs, 9
one data output and a control signal, also known as select input. A multiplexer acts as a switch and connects 10
one of its data inputs to the output, based on the value on its select input. 11
In this figure, if c (the select input) is 0, then the a input is connected to the d output. 12
Otherwise, the b input is connected to the output. 13
After introducing the multiplexer, lets put that into the LUT structure. A conceptual structure 14
of a LUT can be considered as a collection of memory cells connected to a set of multiplexers. 15
This is the conceptual structure of a 2-input look-up table which consists of 4 memory cells and three 16
multiplexers. if both a and b are 0 then cell 0 is connected to the output 17
if a is 1 and b is 0 then cell 1 is connected to the output 18
if a is 0 and b is 1 then cell 2 is connected to the output. if both a and b are 1 then cell 19
3 is connected to the output 20
Having this big picture of a LUT, implementing a given 2-input logical function is as simple 21
as copying the last column of the corresponding truth table into the LUT memory cells. 22
For example, to configure a 2-input LUT to implement an AND gate, we should set the cells 23
by the logic values of 0 0 0 1. 24
A look-up table usually has a couple of inputs and outputs. The number of LUT inputs determines 25
its capacity. 26
For example, a 5-input look-up table can implement any logical function with 5 or fewer variables. 27
For implementing a logical function 28
with more than five variables, you should use more than one 5-input LUT. 29
For example, a 6-input LUT can be created by using two 5-input LUTs and a . 30
multiplexer 31
After understanding the LUT structure, the question is, What elements inside an FPGA can save 32
data temporarily to be used later in the design? 33
The role of temporary memory cells is crucial in FPGA, and they are used almost in all real applications. 34
I will explain the purpose of these types of memory in the next video. 35
This is the takeaway message from this lecture: The multiplexer concept is used to connect LUT’s 36
reconfigurable memory cells to the output. 37
Now the quiz question. Determine the data path in the following LUT and the value of the output 38
if a=0, b=1, c=1;