On several occasions, we should use a single clock cycle pulse to start an event or report the end
of an event, this lecture will explain how to generate the single cycle pulse in each of us.
A single psychopath generates a circuit, has an input and an output, it generates a one clock cycle
with pulse on its output when it detects a rising signal on its input.
Let's consider a clock signal and a white with pulse.
Then as shown in this figure, the output should be a single cycle.
Narrow pulse.
The proposed path generates a circuit, has two estates, wait for one and wait for the wait for one
state is the initial estate during which the input carries the logic value zero.
In this estate, the circuit is waiting for a high voltage level on the input signal.
The wait for zero state is when the input signal carries the logic value one during this to say the
circuit is waiting for a low level voltage on the input signal.
As soon as the circuit detects the one logic value on the input when it is in the wait for one state,
it goes to the wait for zero state.
And assigns the lodging value one to the output, in other cases, the output is zero.
This results in a single cycle, positive pulse on the output.
The design detects a rising edge on the input signal when it is in the wait for one state and the logic
value of one is detected on the input signal.
In this case, it assigns the logical value of one to the output signal and goes to the wait for zero
state.
It goes back to the wait for one state when the input changes to zero.
OK, let's ascribe the design and each of us.
We need a function that receives the one bit input and returns at one bit output.
We can define a static variable to represent the design state, we need to temporary variables, one
for the state and the other for the output.
Then we need a state machine with two states.
After that, the state and output should be modified.
The second, the texturizing edge on the input signal, if it is in the W one or wait for one state
and the input signal is one.
In this case, it goes to the W zero or right four zero state and puts a logging value one on the output
signal.
If the circuit is in the W zero state and the input is also one, the second stays in that state.
It goes to the W one state as soon as it receives a zero on its input.
Now, let's simulate and synthesize the code corrida with a socialist project and add design and test
fires to the project, you can find the files attached to this lecture.
How we look at it has been Sourcefire, it consists of three times the first and last loops, put the
logic value zero on the design function input argument for five cycles.
And then we drill for loop puts a logic value one on the design input argument for five cycles.
Therefore, it generates a five clock cycle pulse on the design input.
Now, let's simulate the design.
Down to chose the appearance of a single psychopath's on the.
We can then synthesize the code and make sure our description is synthesized into a single cycle article
code.
Then run the article CECO Simulation and check the waveforms.
We have generated a single cycle pulse in this lecture.
The question is, how can we generate a regular single cycle pulse with a constant period?
The next lecture will cope with this question.
This is our takeaway message to the state machine can be used to detect an edge on a signal.
Now, the quiz question modified the pulse generator code such that the outward pulse is generated on
the following edge on the input signal.