In a lab for hack's to seven segment display 7 segment display the Base to board contains four seven
segment displays.
We will be using two of them for this assignment seven segment displays are useful for conveying data
easily for humans to read.
We will be using the two displays to represent a single byte which is 8 bits of data which is represented
by the switches on the bases two board bases two board user guide.
Here are some images I pulled from the bases to user guide the 7 segment displays on the base is to
board or comany and this means that the anode or negative sides of the Pleiades are connected to each
other in order to light up a segment we need to drive a logic zero on the output.
Also know that the displays are tied together.
So we need to multiplex the outputs of the display.
Another thing to look at is that we are using the N.P. transistors to drive the display.
So you need a logic zero to allow current to flow through Moulson simulation.
Note that we are only simulating the Hexa servants.
VHDL file the top level VHDL file lab for the HD will not need to be simulated Here's a tasking for
lab for modify and simulate the Hexis 7 SAG VHI the file in Moulson to verify it is working correctly
modify the lab for VHDL file to create two component instantiations implement the lab for BHB design
onto the basis to board.
You see if happening using the U.S. file I have given to you here are the locations of all the different
entity port numbers.
You've just completed lap 4.
Here are the outcomes I understand.
Hi multiplexers circuit works these VHDL processes to create a counter that will slow the 50 megahertz
clock down.
This is important to multiplex the 7st display become more familiar with the Xilinx IAC toolset.