With the full hour here we have an example of a four hour in a data flow sort of type of structure or
architecture and just looking at it on the right.
We've got the digital logic circuit of a full outer or three and puts x y and s.i and then we have our
outputs s and CEO or carry out.
And if you look on the left on in our viewer DL file on lines 5 is where we have our entity declaration
where we're declaring that the are is for one which is describing what our actual circuit is and then
we have the port which is orbit of finding the inputs and outputs.
And you can see that we have assets and see out of the outputs which if you look at the digital circuit
that is the same as an SEO which is calling us you know I mean for inputs X Y and C.
And so just looking at you you can see that that's kind of how it correlates.
Now the architecture on line 14 is where we're actually describing what is going on.
And so if you look you'll see in the architecture we have 1 2 and gates.
If you look at the digital logic circuit you see we have two and Gates as well.
And also if you look in architecture where you've got two three exclusive OR gates that take the back
side we have two three exclusive OR gates.
And if you look just between the digital logic circuit on the right on the beach you know you can see
that the two correlate.
So looking at the sea out it is equal to see in ANDed with X exclusive board with Y.
If you look and see if we have X and Y there being exclusive award and then we or that value with X
and Y and so just just following the actual architecture of the four outer one we can see that it's
doing exactly what we're describing exactly how we want the gauge to place how many gates we want and
where we want them to placed.
And so that's kind of idea when you're working with the data flow.
That's essentially what you're doing in here.
More important though just want to show you that if you look on the VHDL file we have our poor where
we define or put X Y and C in our outputs S and C out and this is all an entity section of the four
outer.
And if you look in the architecture section this is where we're defining what's actually going on.
So the architecture section is the actual gates and the signals between the gates connecting everything
together.
And that is defined in the architecture section.
After we have the begin keyword we define what are see out in what Guess how these outputs are defined
based upon the inputs where you have declared and the statements.