So there are three methods by which we can in memory a specific kind of a memory with a visual, so
we'll go through each and every Metroliner detail so that you can clearly choose which method utilized
to make certain requirements.
OK, so what we first with will declare some of the folk which are required for a single program.
So first we'll proceed with the single program and then probably will understand dual Putera and then
we can have a good comparison between them.
OK, so we have a clock and read.
Right, OK.
Which are a single bit and say so in standard underscore logic.
OK, so this is the first two words that are present inside.
Our design will assume that.
OK, so we required to address sixty four elements.
OK, so when we have a requirement of sixty four elements in that case I just say should be six bitrate.
So we'll just be declaring it to be five down to zero.
Then let's assume that data says that we are targeting, is it right?
So in standard cold logic and then vector seven down to to right.
Similarly, we required a deal where we'll be looking at it back.
So our standard and this core logic and the school vector and then seven down to see.
So this completes all the food that we wish to have.
Inside at like 2:00 is a synchronising signal for our entire lives.
Then we have a U-turn right then.
So when right is high, we will be writing a letter to ready and when writers will be reading the letter
back from our member state, we have an address which is having a of six figures.
So the maximum element that again, addresses.
Sixty four, right to so to six is 64 and then we have a lot of Sisay, so the first method is when
we are not considered or we are not interested in invoking a specific memory.
So we have some general idea and we are least interested in which specific resources to utilize.
So we have to kind of resources for implementing a memory in if we can either use.
Distributor memory, or we can also use a block memory.
So let us assume that we are least interested to invoke a specific.
Resource in that case, we follow the general structure of our time and then we.
I love Revital to choose what will be the best type of memory for our design, right?
So we'll start first will declare Dennery, which will act as a memory for us.
OK, so we start with the type.
OK, let it just name this as meme type, and it is Inari, OK?
And let us assume that there are six to four elements are addressed, plus can address aggressively
sixty four elements, so it will be zero to 63.
So if you can compare two with down you'll be finding down.
Do we have an highest number.
On the left of.
Down to.
And then we have a lowest number, but to operate in exactly opposite.
So on the left side, you have a lowest number or an LSP says you can see and then you have an maximum
try to take you on.
So this is how you specify it.
So you can either use seven down to zero or you can use zero to 60 so that the both represent the number
in the same rate.
So there are sixty four elements and we are targeting the size of a standard and the school logic and
the score vector.
And then we're just adding seven right now, we need to declare that that can work on this, memetics
will proceed with the signal.
We just need this very well and this will be working on this statement.
OK, so this is how you declare the memory type mandate, is that you specified the number of elements
that you were targeting and then the size of each element right now will proceed with writing a code
for our.
So this is a Synchronoss system, so we'll start with the process clock, OK, begin now for us.
Will be sensing an age of a clock, so rising a of a clock right then.
If we have right to be equal to one in that case, we want to write that down to a memory and address
which is specified by a user.
So memory, this is how we have named our variable and then we need to pass on it and there will be
writing.
So that will be updated with the date and addresses.
Here it is, representivity launch.
You can disconnect it, but when we have an Inari, so inside a parenthesis, we need to pass an integer
and we already know how you convert a vector to an integer.
So we'll just try to integer.
OK, this is the first statement that will vary and then unsigned, OK, and we'll just highlight it.
So first, we have converted a logic vector to an unsigned and finally unsigned to an integer.
OK, so this is the difficulty that we get when we walk around with a strongly typed language.
But this also help us to a to.
Specifically track whether we are following the correct data, what we are.
Target date.
So this also avoid an error which are later on very difficult to trace right else, as El's indicate
that we want to read the data.
So Dowd will be updated with whatever data that you have specified and then bringing back that element
from detectorists.
OK, this makes sense.
Now we have our data, too, and if so, we'll decide when and if either and if and then we will just
in the process.
Right.
So this completes of course, what we'll do is we'll just go ahead and see whether we get a green indication
or so we hear.
We have a green indication.
We'll just go back to AVADO and see the element that is invoked for this design.
We just performa synthesis.
So we'll just go ahead Seeb and will perform a synthesis of synthesis will give us an idea what is the
cell for all that from our library, which is being used to implement the memory in this design.
OK, so usually when we have a low depth as well as a low size, so distributer memories have been chosen.
So distributer memory that we use to slice them, which are the logical resources present on an FPGA
architecture to implement a memory so that kind of memories are usually invoked when we have a lower
depth as well as a lower size that we want to store onto a memory.
OK.
So if you just open the synthesized design.
And if you just go to a schematic.
So finding there are certain blocks which have been and so I'll just zoom in a bit to see Guzzo the
Block, which has been invoked on RAM 64 Cross once when this is usually a distributed memory.
In fact, you can just click on this block and then you have that cell property, cell properties.
If you just explode, you'll be finding the type of memory which has been invoked as a distributor.
OK, so you're depending on the code we want to have chosen, which would be the perfect block that
can hang the requirement.
So this is the first case where we are least interested to invoke a specific company, but we allow
people to choose what should be the best memory in specific scenario.
Now, what we'll do is we'll increase that to let it just increase the depth so that we have specified.
OK, so what we'll do is we'll change this to one zero to three, so now we have.
Now, we should be able to map Digresses says that it is capable of handling one zero two four elements,
so it should be of 16 BITRATE.
So we will just change this to nine down to zero.
Now, addresses has been updated.
And one more thing that will be doing is now instead of eight, which we wish to store today to so we
have increased depth as well as the element size.
And for that reason, Dean should also be increased to 32 and the out should also be increased to 32.
So without changing now, the rest of the pack will work just fine because I trust is also capable of
handling one zero two four element and being in doubt is also capable of handling the correct elements.
So we'll just see Rockwool.
And then what we'll do is we'll again performance.
And this will be finding as soon as see who'll be getting a status that syntheses out of there.
So we'll just go ahead and perform.
And this is OK.
And this will give us an idea how, depending on the size and we have specified, we want to automatically
choose a different kind of limit.
OK, so in the previous case, when we have a depth of 64 and the size of it, we want to have choosing
distributer memory for us.
And now we have increased our depth to one zero two four and the size to 32 bit.
Now let's see what we will choose for us.
So we'll just open our synthesis design and then we'll just reload our schematic.
This will go ahead with schematic.
And then you'll be finding no, if I just to minimize it, so here we have Rham.
Thirty six even, right?
So I just go ahead and I'll try to explore the.
So now we have a date.
No.
This is the first week of invoking a memory that if you follow a generalized code, you declare energy
and you write a normal call for your arm, and that will lead to a different kind of memory depending
on the choice of what we want.
OK, so the best choice will be predominantly decided by the world or depending on the requirement that
you have specified.
And the difference will be finding is usually when you have a lower debt as well as a lower elements
case, we will always choose a distributor.
Whereas if you considered an higher debt as well as in higher basis, usually we might go with a block.
OK, this doesn't give us more flexibility because here we are choosing a company for us.
And as an engineer, we in a simple case it is we will be preparing to go with this method.
But in most of the cases we define, we strictly need to know which component we are utilizing in our
design.
OK, so now we'll understand how to specifically invoke a component for choosing the specific kind of
memory inside our system.