So let us try to implement a muslin and we might right to, we will be implementing a forest of one.
So it consists of four detained, but we have a BCT and then one control and we just select.
So depending on the value that we have on and select, then we'll be choosing which input value to be
saved on an output per great save select is zero zero.
We will be collecting Y20 if selected zero one.
We will be collecting to a if selected equals to one zero will be connecting white to see and if selected
equals to one one, we will be collecting right?
Right.
So let it just go ahead and try to utilize first conditional signal statement, right?
So in that case, how we proceed, so our output borders away, right?
So this should be assigned to a right van when we have now the condition for us, the deciding condition
is the different value of select that we have, right?
So if selected as equals two and equals two in the we usually single equals to say and so if you have
an experience with ANC, so you could clearly.
Guess that single equals two years used to assign a value to a variable.
That's when we want to check an expression.
We used to be close to saying right, but in this year we use the signal assignment operator or variable
assignment operated was saying a value to signal or a variable.
And the to check whether two weeks expressions are equal or not.
Okay, we just use this single equals to say so remember this thing.
So select should be close to lyricism zero zero zero zero, basically and multiply it.
So we will be utilizing double code and then we add zeros, right?
So this is the first condition, then we need to add else right after this.
We will just be adding a value of B right, and this should be the case when select is equal to the
zero rate else.
And we could just add C when.
Select is equals to one zero, right?
Else we could just add.
OK, when select as equals to.
You know, one, right?
So this complete are all the street that we are interested in.
So we just add the same column over here, right?
So we won't be adding a semicolon until we cover all the conditions, right, which we did over here,
Rachel, we start like this.
The way should be assigned to me when we have this condition, evaluate to true right and it will be
assigned to be if this condition evaluates to two.
And we already know that when we consider the conditional signal assignment or a conditional signal
statement in that case, OK, we will be evaluating in an order.
OK, so the first expression that we specify will be evaluated first.
And if that evaluates to true, we won't be checking rest of the expression, right?
If that won't evaluate to true.
In that case, we check the next expression again if it evaluates to true.
We will be skipping the rest of the expression.
If it doesn't evaluate to true, then we.
Check the next expression, right, so this is how we evaluate an expression, and this basically lead
to the creation of the network of a Muktsar, a chain of Lomax-Smith rate.
So if you just see the code right.
And if you go to an ideal schematic rates, if you go to an actual schematic.
So here you could clearly notice that with the conditional signals treatment, you get a chain of osmosis
rate.
So here the difficulties you could see that, you know, for Marxist, but we have some extra logic
benighted, right, because we are working with the standard and logic type, and we only specified
the combinations with 091.
OK.
Dad basically lead to addition of Alachua here, as well as some extra logic, right, which we have
not expected in this case, Stu.
To handle this situation, we just need to specify an LS value what should be done when we have risked
all that condition right to?
Okay.
So we just need to add what should be the value that will be assigned to a y.
OK, when we do not have this condition evaluating to a right to in the rest of the cases, OK, we
will simply be collecting way to a two.
So let me just see our code and try to reload a schematic data with this modification.
We should be getting the correct schematic as expected, right?
So now if you go to a schematic now, you could see the the rest of the logic, which has been added
OK and a latch is removed, right?
So we have a chain of a Marxist, so this is what we refer to as a uniform axis.
Now you could see the.
Mucks, which is connected next to the output port, it's connected to hourly rate, so as soon as this
expression evaluate to true that that is the select condition is met.
We will be directly sending or connecting Y to a rate the rest of the things will not be evaluating
and so on and so forth, right?
So this is how the ideal schematic will look when we work with the conditional signals statement right
now.
Similar thing if you try to implement with the selected signal statement.
OK.
So the different spin rate will just be commenting this old statement, right?
So just select all the statement and here you have an option to command multiple lines, right?
So let us try to understand now how we work with then the selected signal Steedman, right?
So we proceed like this a bit.
OK, then we add conditions.
So for us, the condition is the different value of a select that we have.
OK, then we need to add select right.
So this is the typical form and that we have to wait and select and in you knew you need to specify
the condition.
Great was that distant, OK?
We specify the different values for Y, depending on the condition.
So Y will be close to.
OK.
This should be done when I select value zero zero, right?
So this represents our first condition now.
We still have the conditions to be specified, right?
So we could not use the semicolon because semicolon will mark an end of all the expression, right?
So we'll just be utilizing comma.
This is how we distinguish between the different expression, right?
So y will be closed.
We when we have a value of zero zero, it will be close to B when we have.
OK, then we have a value of zero one.
Then again, we add a comma, OK, because we still have some condition to be specified right when we
have one zero will be connecting it to C.
And finally, we will be connecting it to D when we have one word, right?
So the rest of the condition similar to what we did over here.
Right.
So as we basically include all this which are not declared over here, right?
In this case, what we could do is we could just add it will be close to zero when we have at this rate
because we do not have something isalso here.
So we could just add either so either basically represent the condition that we have not specified over
here.
OK, so anything other than that, if occur, then we should be connected to a Z, right?
So this is how you specify the selected signal C, right?
So now we'll go ahead and try to invoke the ideal schematic that we have, right?
So we just need to reload our elaborated design.
And if everything goes fine, you could actually see parallel marks been created over here, right?
So you could see we have a forest one, which is then higher order that is created right there.
And depending on the value that we have now, you could clearly see all the values will be evaluated
at a SEMA instance, Rachel, if our value is one zero.
So.
We will be immediately sending the sea to an outbreak, so this won't be evaluated in a priority, right?
So this is the fundamental difference that we have between conditional signal's treatment and the selected
signal Steedman, right?
So both of them after us and this is a very give us scene that you won't be finding any difference,
OK?
Now remember, the performance depends purely on the primitives that we walk.
And that finally goes to an FPGA, a tool to demonstrate whether we actually have any performance difference
between this two method.
What we could do is we could just compare the synthesis schematic that we get in both the cases, right?
So here we have our synthesis complete for our second case that is selected signals statement we go
to open.
This is to say OK, and we'll just be analyzing the schematic that we have for this cool, right?
So if you go to the synthesis there, you have a schematic tap, right?
So this represents our technology schematic.
Now here, if you could observe.
So we have series of Iber, which are binary rate for each boat so far be we have a neighbor for you.
Also, we have a neighbor full for all the input we have a neighbor to select is off so stupid.
So we have to either.
Then we have one LG G6, which has been invoked, right?
And then we have an outbreak to do that, the seeds of primitives that have been invoked for our call.
Now what are we going to do is we will just be.
Commenting this selected signal, Steve Schmidt, and we will be on commending our condition and signals
treatment right now after this modification will see our goal.
And once.
Are wholly successful U.S. rate that could be analyzed by observing the source code name data, if you
perform any modification to a code, you would clearly see it automatically get an asterisk.
Saying that basically mean we have some unsafe changes.
So just press control A..
So all the changes will be so great to see with the changes being saved as stick will be automatically
removed.
Now we proceed to again perform a synthesis, right?
You also get an output out of dates, synthesis we did as soon as you perform a modification to a great.
So once you perform synthesis again, we could clearly notice whether we have any differences in an
synthesized schematic because that represent the technology schematic, which will be finally going
on to an FPGA, right?
So we'll just wait for synthesis to complete.
OK, so synthesis is complete.
It will just be opening our synthesis design and going to a schematic fabric to this will automatically
open the technology schematic right now here, if you observe right, still who you have with six IWBF
which have been added, then you have an elitist six which is added and then we have an all.
Right?
So in both the cases, you get an exact same schematic.
OK.
And I will be finally going to an FPGA so you won't be finding any differences in a performance will
get both.
The method will give the same performance.
Only difference is the way they evaluate an expression.
Right?
So remember this thing.
And in most of the cases, whenever you have a multiple expression that we want to connect to an output
code, the easiest way is to prefer working with the behavioral modeling style.
And that is what we going to understand next.
So same thing that we have the over here with the conditional signal statement and the selected signal
statement could be achieved with easily with the behavioral modeling state, right?
So in most of the cases, whenever you are in a situation where you want to assign the multiple expression
to an output or we are ready whenever you have said certain complex logic like this.
OK.
We prefer to use our behavioral modeling style or dataflow modeling, stay late, so remember this fact
we will be preferring to use a dataflow modeling sale only when we replace our system with the basic
logic.
In fact, we discussed some of an operator such as Automatic Hall Rotation Shift Operator, but whenever
we are in a situation to implement that kind of block prefer to go with the behavioral modeling states
the same thing you could at you easily with the behavioral modeling stay.