Now, we already looked into how we use a lead me to hide due to a condition that is how we use the
finals.
We'll give you also understood how we can use the multiple coalition in a statement.
To sum up, the good practice that you need to follow is, for example, whenever you are utilizing
a final statement, see that all the coalition, the behavior for all the conditions are specified.
So when we consider the finals, so we have this condition, right?
So when this condition is true, we need to specify the behavior and basically representing what should
be the system behavior when this condition is not true, right?
So this basically represent a complete behavior where we have a condition and we have specified what
should be done when that condition evaluates to true.
We also have specified what should be done when the condition is not evaluated to the right.
So this represents the complete behavior.
Now let's assume if we remove the cells from this, if construct right, so we remove else now this
is what we refer to as an incomplete behavior where we are defining what should be done when the condition
evaluates to true.
But we have not specified what should be done, then this condition do not.
All right.
So this basically leads to the creation of a latch, right?
So Latch are not natively supported by an FPGA.
OK, so that basically restrict our maximum frequency usage and also design the extra circuitry into
our entire design, right?
So it is highly recommended that you correctly specify the complete behavior for your condition, right?
And it will lead to creation of an extra circuitry.
And you may get an unexpected behavior from an implemented rate to with this.
OK, so we already know that when we completely specify the behavior, we are able to invoke always
to one select already display and try to first analyze the behavior we get, then we correctly specify
all the conditions, right?
So here we specified when selected 0Y should be connected to it and else y should be, this should be
right.
Okay, so here we correctly define all the condition, right?
So let me just reload our schematic and analyze the component that is being worked out for this, right?
So if you analyze a schematic, you able to invoke article marks.
OK, two of the inputs are organically connected to an input performance.
And we also have a control input connected to a great time.
The output is also connected to an all fly great.
So this represents the correct component, right, that we want when you walk out of this call.
Now, if you just dream, who else like wants to be right?
So this basically represent an incomplete behavior.
OK, here we do not mention the system behavior when conditions do not evaluate the true right.
And this basically will lead to creation of a large and an extra circuitry OK, resulting into an unpredictable
behavior.
So if you just analyze the schematic after this modification, you could clearly see we have an ideal
max rate.
But Dr. Max is connected to something else, right?
So it is connected to we see over here and here it is connected to a ground.
And then if you analyze this.
OK, so we have one latch which is in there.
It is connected to this deal, but this is not something that we are expecting, right?
So we are expecting a month, but we want to get something which we never expect to make.
So remember, whenever you are utilizing offensively, you must declare the behavior of the system and
condition, evaluate to true and the behavior when conditions do not evaluate you, right?