### Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.

Software Version and Target Device
Product Version: | ISE:12.4 (WebPack) - M.81d | Target Family: | Spartan3E
OS Platform: | NT64 | Target Device: | xc3s100e
Project ID (random number) | a58fbea0c9e9413b814544de1c078e64.74799D7DE2C542C39FB3A9A6945FE04A.3 | Target Package: | cp132
Registration ID | 0_0_616 | Target Speed: | -4
Date Generated | 2017-04-20T19:05:58 | Tool Flow | ISE

User Environment
OS Name | Microsoft | OS Release | Service Pack 1 (build 7601)
CPU Name | Intel(R) Core(TM) i7-2630QM CPU @ 2.00GHz | CPU Speed | 1995 MHz

Device Usage Statistics
Macro Statistics | Miscellaneous Statistics | Net Statistics | Site Usage
Accumulators=2 24-bit updown accumulator=2 Adders/Subtractors=28 24-bit adder=3 24-bit addsub=1 3-bit adder=3 4-bit adder=18 5-bit adder=3 Comparators=36 24-bit comparator greatequal=6 24-bit comparator less=3 24-bit comparator lessequal=6 5-bit comparator greater=21 Counters=2 27-bit up counter=2 FSMs=1 Multiplexers=1 24-bit 6-to-1 multiplexer=1 ROMs=13 16x7-bit ROM=13 Registers=348 Flip-Flops=348 | MiscellaneousStatistics AGG_BONDED_IO=38 AGG_IO=38 AGG_SLICE=547 NUM_4_INPUT_LUT=987 NUM_BONDED_IBUF=10 NUM_BONDED_IOB=28 NUM_BUFGMUX=2 NUM_CYMUX=312 NUM_LUT_RT=75 NUM_SLICEL=547 NUM_SLICE_FF=372 NUM_XOR=198 | NetStatistics NumNets_Active=1079 NumNets_Gnd=1 NumNets_Vcc=1 NumNodesOfType_Active_CLKPIN=268 NumNodesOfType_Active_CNTRLPIN=99 NumNodesOfType_Active_DOUBLE=1653 NumNodesOfType_Active_DUMMY=3083 NumNodesOfType_Active_DUMMYESC=10 NumNodesOfType_Active_GLOBAL=68 NumNodesOfType_Active_HFULLHEX=10 NumNodesOfType_Active_HUNIHEX=52 NumNodesOfType_Active_INPUT=3399 NumNodesOfType_Active_IOBOUTPUT=10 NumNodesOfType_Active_OMUX=1043 NumNodesOfType_Active_OUTPUT=1035 NumNodesOfType_Active_PREBXBY=845 NumNodesOfType_Active_VFULLHEX=29 NumNodesOfType_Active_VLONG=1 NumNodesOfType_Active_VUNIHEX=75 NumNodesOfType_Gnd_DOUBLE=4 NumNodesOfType_Gnd_INPUT=8 NumNodesOfType_Gnd_OMUX=3 NumNodesOfType_Gnd_OUTPUT=7 NumNodesOfType_Gnd_PREBXBY=10 NumNodesOfType_Vcc_CNTRLPIN=2 NumNodesOfType_Vcc_INPUT=19 NumNodesOfType_Vcc_PREBXBY=17 NumNodesOfType_Vcc_VCCOUT=18 SiteStatistics IBUF-DIFFM=4 IBUF-DIFFMI=1 IBUF-DIFFSI=1 IOB-DIFFM=13 IOB-DIFFS=13 SLICEL-SLICEM=236 | SiteSummary BUFGMUX=2 BUFGMUX_GCLKMUX=2 BUFGMUX_GCLK_BUFFER=2 IBUF=10 IBUF_INBUF=10 IBUF_PAD=10 IOB=28 IOB_OUTBUF=28 IOB_PAD=28 SLICEL=547 SLICEL_C1VDD=33 SLICEL_C2VDD=38 SLICEL_CYMUXF=164 SLICEL_CYMUXG=148 SLICEL_F=503 SLICEL_F5MUX=72 SLICEL_FFX=256 SLICEL_FFY=116 SLICEL_G=484 SLICEL_GNDF=95 SLICEL_GNDG=77 SLICEL_XORF=100 SLICEL_XORG=98

Configuration Data
BUFGMUX S=[S_INV:2] [S:0] BUFGMUX_GCLKMUX DISABLE_ATTR=[LOW:2] S=[S_INV:2] [S:0] IBUF_PAD IOATTRBOX=[LVCMOS25:10] IOB O1=[O1_INV:0] [O1:28] IOB_OUTBUF IN=[IN_INV:0] [IN:28] IOB_PAD DRIVEATTRBOX=[12:28] IOATTRBOX=[LVCMOS25:28] SLEW=[SLOW:28] | SLICEL BX=[BX_INV:2] [BX:127] BY=[BY:43] [BY_INV:0] CE=[CE:56] [CE_INV:0] CIN=[CIN_INV:0] [CIN:144] CLK=[CLK:103] [CLK_INV:165] SR=[SR:40] [SR_INV:3] SLICEL_CYMUXF 0=[0:164] [0_INV:0] 1=[1_INV:2] [1:162] SLICEL_CYMUXG 0=[0:148] [0_INV:0] | SLICEL_F5MUX S0=[S0:72] [S0_INV:0] SLICEL_FFX CE=[CE:56] [CE_INV:0] CK=[CK:95] [CK_INV:161] D=[D:256] [D_INV:0] FFX_INIT_ATTR=[INIT0:243] [INIT1:13] FFX_SR_ATTR=[SRLOW:241] [SRHIGH:15] LATCH_OR_FF=[FF:256] SR=[SR:40] [SR_INV:3] SYNC_ATTR=[ASYNC:213] [SYNC:43] | SLICEL_FFY CE=[CE:56] [CE_INV:0] CK=[CK:80] [CK_INV:36] D=[D:116] [D_INV:0] FFY_INIT_ATTR=[INIT0:101] [INIT1:15] FFY_SR_ATTR=[SRLOW:101] [SRHIGH:15] LATCH_OR_FF=[FF:116] SR=[SR:38] [SR_INV:3] SYNC_ATTR=[ASYNC:75] [SYNC:41] SLICEL_XORF 1=[1_INV:2] [1:98] |

Pin Data
BUFGMUX I0=2 O=2 S=2 BUFGMUX_GCLKMUX I0=2 OUT=2 S=2 BUFGMUX_GCLK_BUFFER IN=2 OUT=2 IBUF I=10 PAD=10 IBUF_INBUF IN=10 OUT=10 IBUF_PAD PAD=10 IOB O1=28 PAD=28 IOB_OUTBUF IN=28 OUT=28 IOB_PAD PAD=28 SLICEL BX=129 BY=43 CE=56 CIN=144 CLK=268 COUT=148 F1=502 F2=418 F3=366 F4=265 G1=481 G2=397 G3=357 G4=294 SR=43 X=216 XB=10 XQ=256 Y=283 YQ=116 | SLICEL_C1VDD 1=33 SLICEL_C2VDD 1=38 SLICEL_CYMUXF 0=164 1=164 OUT=164 S0=164 SLICEL_CYMUXG 0=148 1=148 OUT=148 S0=148 SLICEL_F A1=502 A2=418 A3=366 A4=265 D=503 SLICEL_F5MUX F=72 G=72 OUT=72 S0=72 SLICEL_FFX CE=56 CK=256 D=256 Q=256 SR=43 | SLICEL_FFY CE=56 CK=116 D=116 Q=116 SR=41 SLICEL_G A1=481 A2=397 A3=357 A4=294 D=484 SLICEL_GNDF 0=95 SLICEL_GNDG 0=77 SLICEL_XORF 0=100 1=100 O=100 SLICEL_XORG 0=98 1=98 O=98

Tool Usage
Command Line History xst -intstyle ise -ifn <ise_file> ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s100e-cp132-4 <fname>.ngc <fname>.ngd map -intstyle ise -p xc3s100e-cp132-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf bitgen -intstyle ise -f <fname>.ut <fname>.ncd xst -intstyle ise -ifn <ise_file> ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s100e-cp132-4 <fname>.ngc <fname>.ngd map -intstyle ise -p xc3s100e-cp132-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf bitgen -intstyle ise -f <fname>.ut <fname>.ncd xst -intstyle ise -ifn <ise_file> ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s100e-cp132-4 <fname>.ngc <fname>.ngd map -intstyle ise -p xc3s100e-cp132-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf bitgen -intstyle ise -f <fname>.ut <fname>.ncd

Software Quality
Run Statistics
XSLTProcess | 41 | 41 | 0 | 0 | 0 | 0 | 0
_impact | 4 | 4 | 0 | 0 | 0 | 0 | 0
bitgen | 46 | 46 | 0 | 0 | 0 | 0 | 0
cpldfit | 41 | 41 | 0 | 0 | 0 | 0 | 0
edif2ngd | 1 | 1 | 0 | 0 | 0 | 0 | 0
hprep6 | 41 | 41 | 0 | 0 | 0 | 0 | 0
ibiswriter | 1 | 1 | 0 | 0 | 0 | 0 | 0
map | 44 | 44 | 0 | 0 | 0 | 0 | 0
ngc2edif | 6 | 6 | 0 | 0 | 0 | 0 | 0
ngcbuild | 1 | 1 | 0 | 0 | 0 | 0 | 0
ngdbuild | 101 | 101 | 0 | 0 | 0 | 0 | 0
par | 44 | 43 | 1 | 0 | 0 | 0 | 0
taengine | 17 | 17 | 0 | 0 | 0 | 0 | 0
trce | 43 | 43 | 0 | 0 | 0 | 0 | 0
tsim | 41 | 41 | 0 | 0 | 0 | 0 | 0
xbash | 1 | 1 | 0 | 0 | 0 | 0 | 0
xst | 128 | 127 | 0 | 0 | 0 | 0 | 0

Help Statistics
Search words with results
adding bus ( 1 ) | adding a bus ( 1 )
bus ( 1 ) | bus tap ( 1 )
bus taps ( 1 ) | counter ( 1 )
using bus taps ( 1 )
Help files
/doc/usenglish/isehelp/cpld_all/libs_le_buf.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_bufgsr.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_cb4ce.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_cb4cle.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_cb8re.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_cd4ce.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_cj4ce.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_cj8re.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_comp16.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_comp8.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_compm2.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_d2_4e.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_d4_16e.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_fd.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_fjkp.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_inv.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_ld.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_ld16.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_ld4.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_ldc.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_ldcp.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_ldp.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_m2_1e.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_m4_1e.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_nand2.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_nand7.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_nor2.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_sr4rled.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_xnor2.htm ( 1 ) | /doc/usenglish/isehelp/cpld_all/libs_le_xnor7.htm ( 1 )
/doc/usenglish/isehelp/pim_r_supported_spi_bpi_proms.htm ( 1 ) | /doc/usenglish/isehelp/pn_db_npw_device_properties.htm ( 1 )
/doc/usenglish/isehelp/pn_db_nsw_select_source_type.htm ( 1 ) | /doc/usenglish/isehelp/spartan3e/libs_le_cb16ce.htm ( 1 )
/doc/usenglish/isehelp/spartan3e/libs_le_cb16cled.htm ( 1 ) | /doc/usenglish/isehelp/spartan3e/libs_le_cb2cled.htm ( 1 )
/doc/usenglish/isehelp/spartan3e/libs_le_cb4ce.htm ( 1 ) | /doc/usenglish/isehelp/spartan3e/libs_le_cb4cle.htm ( 1 )
/doc/usenglish/isehelp/spartan3e/libs_le_cc16ce.htm ( 1 ) | /doc/usenglish/isehelp/spartan3e/libs_le_pullup.htm ( 1 )
/doc/usenglish/isehelp/spartan3e/libs_le_sr4ce.htm ( 1 ) | /doc/usenglish/isehelp/spartan3e/libs_le_sr4cled.htm ( 1 )
/doc/usenglish/isehelp/sse_c_bus_names.htm ( 1 ) | /doc/usenglish/isehelp/sse_c_name_nets_to_bus.htm ( 1 )
/doc/usenglish/isehelp/sse_c_nets.htm ( 1 ) | /doc/usenglish/isehelp/sse_c_overview.htm ( 1 )
/doc/usenglish/isehelp/sse_db_net_attr_visibility.htm ( 1 ) | /doc/usenglish/isehelp/sse_db_obsolete_symbols.htm ( 1 )
/doc/usenglish/isehelp/sse_n_adding_bus_tap.htm ( 1 ) | /doc/usenglish/isehelp/sse_p_adding_bus_tap_autonaming.htm ( 1 )
/doc/usenglish/isehelp/sse_p_adding_bus_tap_manually.htm ( 1 ) | /doc/usenglish/isehelp/sse_p_adding_net.htm ( 1 )
/doc/usenglish/isehelp/sse_p_connecting_net_bus.htm ( 1 ) | /doc/usenglish/isehelp/sse_p_creating_bus.htm ( 1 )
/doc/usenglish/isehelp/sse_p_naming_bus.htm ( 1 ) | /doc/usenglish/isehelp/sse_p_naming_net.htm ( 1 )

Project Statistics
PROP_Enable_Message_Filtering=false | PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced | PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false | PROP_ProjectDescription=Arithmetic Logic Unit Implementation in VHDL.
PROP_PropSpecInProjFile=Store all values | PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed | PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false | PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2017-04-20T15:23:25 | PROP_intWbtProjectID=74799D7DE2C542C39FB3A9A6945FE04A
PROP_intWbtProjectIteration=3 | PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No | PROP_AutoTop=true
PROP_DevFamily=Spartan3E | PROP_DevDevice=xc3s100e
PROP_DevFamilyPMName=spartan3e | PROP_DevPackage=cp132
PROP_Synthesis_Tool=XST (VHDL/Verilog) | PROP_DevSpeed=-4
PROP_PreferredLanguage=VHDL | FILE_UCF=1
FILE_VHDL=7

Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 | NGDBUILD_NUM_BUFGP=1 | NGDBUILD_NUM_FD=31 | NGDBUILD_NUM_FDCE_1=52
NGDBUILD_NUM_FDC_1=145 | NGDBUILD_NUM_FDE=60 | NGDBUILD_NUM_FDR=54 | NGDBUILD_NUM_FDS=30
NGDBUILD_NUM_GND=1 | NGDBUILD_NUM_IBUF=9 | NGDBUILD_NUM_INV=97 | NGDBUILD_NUM_LUT1=75
NGDBUILD_NUM_LUT2=92 | NGDBUILD_NUM_LUT3=157 | NGDBUILD_NUM_LUT3_D=3 | NGDBUILD_NUM_LUT3_L=4
NGDBUILD_NUM_LUT4=453 | NGDBUILD_NUM_LUT4_D=37 | NGDBUILD_NUM_LUT4_L=69 | NGDBUILD_NUM_MUXCY=312
NGDBUILD_NUM_MUXF5=72 | NGDBUILD_NUM_OBUF=28 | NGDBUILD_NUM_VCC=1 | NGDBUILD_NUM_XORCY=198
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=2 | NGDBUILD_NUM_FD=31 | NGDBUILD_NUM_FDCE_1=52 | NGDBUILD_NUM_FDC_1=145
NGDBUILD_NUM_FDE=60 | NGDBUILD_NUM_FDR=54 | NGDBUILD_NUM_FDS=30 | NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=9 | NGDBUILD_NUM_IBUFG=1 | NGDBUILD_NUM_INV=97 | NGDBUILD_NUM_LUT1=75
NGDBUILD_NUM_LUT2=92 | NGDBUILD_NUM_LUT3=157 | NGDBUILD_NUM_LUT3_D=3 | NGDBUILD_NUM_LUT3_L=4
NGDBUILD_NUM_LUT4=453 | NGDBUILD_NUM_LUT4_D=37 | NGDBUILD_NUM_LUT4_L=69 | NGDBUILD_NUM_MUXCY=312
NGDBUILD_NUM_MUXF5=72 | NGDBUILD_NUM_OBUF=28 | NGDBUILD_NUM_VCC=1 | NGDBUILD_NUM_XORCY=198