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-- IP VLNV: xilinx.com:user:Hex_to_7_Seg:1.0
-- IP Revision: 2

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;

ENTITY design_1_Hex_to_7_Seg_0_1 IS
  PORT (
    seven_seg : OUT STD_LOGIC_VECTOR(6 DOWNTO 0);
    hex : IN STD_LOGIC_VECTOR(3 DOWNTO 0)
  );
END design_1_Hex_to_7_Seg_0_1;

ARCHITECTURE design_1_Hex_to_7_Seg_0_1_arch OF design_1_Hex_to_7_Seg_0_1 IS
  ATTRIBUTE DowngradeIPIdentifiedWarnings : string;
  ATTRIBUTE DowngradeIPIdentifiedWarnings OF design_1_Hex_to_7_Seg_0_1_arch: ARCHITECTURE IS "yes";

  COMPONENT Hex_to_7_Seg IS
    PORT (
      seven_seg : OUT STD_LOGIC_VECTOR(6 DOWNTO 0);
      hex : IN STD_LOGIC_VECTOR(3 DOWNTO 0)
    );
  END COMPONENT Hex_to_7_Seg;
  ATTRIBUTE X_CORE_INFO : STRING;
  ATTRIBUTE X_CORE_INFO OF design_1_Hex_to_7_Seg_0_1_arch: ARCHITECTURE IS "Hex_to_7_Seg,Vivado 2015.4";
  ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
  ATTRIBUTE CHECK_LICENSE_TYPE OF design_1_Hex_to_7_Seg_0_1_arch : ARCHITECTURE IS "design_1_Hex_to_7_Seg_0_1,Hex_to_7_Seg,{}";
  ATTRIBUTE CORE_GENERATION_INFO : STRING;
  ATTRIBUTE CORE_GENERATION_INFO OF design_1_Hex_to_7_Seg_0_1_arch: ARCHITECTURE IS "design_1_Hex_to_7_Seg_0_1,Hex_to_7_Seg,{x_ipProduct=Vivado 2015.4,x_ipVendor=xilinx.com,x_ipLibrary=user,x_ipName=Hex_to_7_Seg,x_ipVersion=1.0,x_ipCoreRevision=2,x_ipLanguage=VHDL,x_ipSimLanguage=MIXED}";
BEGIN
  U0 : Hex_to_7_Seg
    PORT MAP (
      seven_seg => seven_seg,
      hex => hex
    );
END design_1_Hex_to_7_Seg_0_1_arch;
